IP Cores - Company Ranking(14 companyies in total)
Last Updated: Aggregation Period:Jul 23, 2025〜Aug 19, 2025
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Display Company Information
Company Name | Featured Products | ||
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Product Image, Product Name, Price Range | overview | Application/Performance example | |
![]() USB 3.0 IP core for FPGA
Other |
■Compliant with USB 3.0 Specification Revision 1.0 ■Provides host controller or device controller ■Includes link layer and protocol layer ■Physical layer interfaces with TI's PHY chip ■Core frequency can be selected at 250MHz for PIPE connection and over 125MHz internally ■Supports 16-bit USB 3.0 PIPE interface ■Supports up to 15 IN/OUT route points (host side IP) or endpoints (device side IP) (1 control, 7 IN/OUT each) ■Supports all transfer types (Control transfer, Bulk transfer, Isochronous transfer, Interrupt transfer) ■Reliable domestic support | It is possible to easily implement a FAT32 data recorder system on the USB 3.0 device side IP core. ■ Since it is recognized as FAT32 external storage by the OS, no drivers are needed for either Windows or Linux!! ■ We have prepared a reference design that operates on actual hardware. ■ Free evaluation demos are available on Altera/Xilinx FPGA boards. | |
SATA IP core for FPGA
Other |
- Compliant with Serial ATA specification revision 3.0 - Supports both host and device sides with a single core license - Compact with resource consumption below 500 Slices, highly effective in multi-channel RAID systems - Simple transaction I/F and DMA I/F for host processors - Host I/F is 32-bit wide - Implements a 4KB FIFO using BRAM in the data transmission path - Core logic itself operates at a low speed that fits easily with timing - Supports CONT primitives for EMI reduction - Allows for pre-purchase core evaluation on various Xilinx/Altera FPGA boards - RAID reference design is included as standard with the IP core product - Supports AHCI, enabling Linux boot from FPGA - Offers a lineup of Host controller IP - Supports exFAT file system (optional) - Reliable domestic support | By combining the SATA-IP core with the "SATA Host IP Core," it is possible to automatically control SATA using only logic without utilizing the CPU, thereby constructing a storage system. Since the core is designed with pure hard-wired logic, it always controls the SATA channel with the best performance. This host IP core is ideal for applications such as ultra-fast data recording systems and RAID controllers. Additionally, the "SATA AHCI IP Core" allows access to SATA devices from the system's processor while maximizing the capabilities and performance of the SATA devices. It enables direct access to SATA devices from a Linux OS running on an ARM processor embedded in an FPGA, allowing users to manage SATA storage as drives or files. This enables application development using the standard libraries of Linux OS, making it an optimal solution for embedded storage systems, RAID controllers, and high-speed large-capacity data collection systems. | |
![]() TOE100G-IP core for FPGA
Other |
■Supports simultaneous transmission and reception of TCP 100GbE (Full Duplex) ■Pure hardware-wired TCP/IP protocol stack ■Single session connection ■Supports both server and client modes (passive/active open/close) ■High-speed processing for transmission and reception ■Supports jumbo frames (during transmission) ■Transmission/reception buffer size can be adjusted to optimal points based on resource consumption and performance ■User-friendly interface (data I/F is FIFO type, control I/F is register type) ■Supports IPv4 ■Evaluation boards from Xilinx/Intel can be used for core evaluation before purchase ■Includes a reference project that operates on the actual device, with all source code provided except for the core ■Reliable domestic support | The TOE100G-IP core is an optimal solution for applications that require high-speed transfer of large amounts of data, such as video and storage. (Application examples) ■ Multi-channel HD video streaming ■ Autonomous driving development systems composed of multi-channel cameras, LIDAR, radar, and sensors ■ Medical scanners such as MRI and PET scans | |
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- Featured Products
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USB 3.0 IP core for FPGA
- overview
- ■Compliant with USB 3.0 Specification Revision 1.0 ■Provides host controller or device controller ■Includes link layer and protocol layer ■Physical layer interfaces with TI's PHY chip ■Core frequency can be selected at 250MHz for PIPE connection and over 125MHz internally ■Supports 16-bit USB 3.0 PIPE interface ■Supports up to 15 IN/OUT route points (host side IP) or endpoints (device side IP) (1 control, 7 IN/OUT each) ■Supports all transfer types (Control transfer, Bulk transfer, Isochronous transfer, Interrupt transfer) ■Reliable domestic support
- Application/Performance example
- It is possible to easily implement a FAT32 data recorder system on the USB 3.0 device side IP core. ■ Since it is recognized as FAT32 external storage by the OS, no drivers are needed for either Windows or Linux!! ■ We have prepared a reference design that operates on actual hardware. ■ Free evaluation demos are available on Altera/Xilinx FPGA boards.
SATA IP core for FPGA
- overview
- - Compliant with Serial ATA specification revision 3.0 - Supports both host and device sides with a single core license - Compact with resource consumption below 500 Slices, highly effective in multi-channel RAID systems - Simple transaction I/F and DMA I/F for host processors - Host I/F is 32-bit wide - Implements a 4KB FIFO using BRAM in the data transmission path - Core logic itself operates at a low speed that fits easily with timing - Supports CONT primitives for EMI reduction - Allows for pre-purchase core evaluation on various Xilinx/Altera FPGA boards - RAID reference design is included as standard with the IP core product - Supports AHCI, enabling Linux boot from FPGA - Offers a lineup of Host controller IP - Supports exFAT file system (optional) - Reliable domestic support
- Application/Performance example
- By combining the SATA-IP core with the "SATA Host IP Core," it is possible to automatically control SATA using only logic without utilizing the CPU, thereby constructing a storage system. Since the core is designed with pure hard-wired logic, it always controls the SATA channel with the best performance. This host IP core is ideal for applications such as ultra-fast data recording systems and RAID controllers. Additionally, the "SATA AHCI IP Core" allows access to SATA devices from the system's processor while maximizing the capabilities and performance of the SATA devices. It enables direct access to SATA devices from a Linux OS running on an ARM processor embedded in an FPGA, allowing users to manage SATA storage as drives or files. This enables application development using the standard libraries of Linux OS, making it an optimal solution for embedded storage systems, RAID controllers, and high-speed large-capacity data collection systems.
TOE100G-IP core for FPGA
- overview
- ■Supports simultaneous transmission and reception of TCP 100GbE (Full Duplex) ■Pure hardware-wired TCP/IP protocol stack ■Single session connection ■Supports both server and client modes (passive/active open/close) ■High-speed processing for transmission and reception ■Supports jumbo frames (during transmission) ■Transmission/reception buffer size can be adjusted to optimal points based on resource consumption and performance ■User-friendly interface (data I/F is FIFO type, control I/F is register type) ■Supports IPv4 ■Evaluation boards from Xilinx/Intel can be used for core evaluation before purchase ■Includes a reference project that operates on the actual device, with all source code provided except for the core ■Reliable domestic support
- Application/Performance example
- The TOE100G-IP core is an optimal solution for applications that require high-speed transfer of large amounts of data, such as video and storage. (Application examples) ■ Multi-channel HD video streaming ■ Autonomous driving development systems composed of multi-channel cameras, LIDAR, radar, and sensors ■ Medical scanners such as MRI and PET scans
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